The present invention relates to a semiconductor device and, more particularly, to a semiconductor device having a germanium layer as a channel and a method for manufacturing the same.
As integrity of semiconductor devices is increased, an FET (Field Effect Transistor) where a bulk silicon is used as a body, is scaled down such that the short channel effect and leakage current are occurring in the bulk Si FET.
So as to solve the problems, a method for manufacturing a semiconductor device where a transistor is embedded in the SOI substrate has been suggested. In the SOI transistor, a floating body effect can occur. The SOI substrate has a structure where an insulating layer is interposed between a semiconductor substrate and a silicon layer such that the SOI substrate itself has a capacitor structure. If charges are repeatedly moved through the transistor body, the charges can accumulate in the capacitor through a generation and recombination process of carriers due to an applied bias. The accumulated charges can seriously affect the operation of the semiconductor device. This is because the threshold voltage is changed due to the charges accumulated in the capacitor and the heat (i.e., temperature increase) generated through the repetitive charge and discharge process in the capacitor. Depending on the electric field concentration, the leakage current consistently occurs.
In the above manufacturing method, so as to reduce the leakage current such as Drain-Induced Barrier Lowering (DIBL) due to the short effective channel and the body effect, a recess gate has been developed using the trench technology in MOSFETs of the semiconductor devices. However, as the effective channel is further shortened, the recess method using a trench process arrives at a limit. In particular, in the prior Si substrate, the leakage current is increased due to reduction in the effective channel, the low power driving becomes difficult, and the manufacturing cost is high.